AT90USB1286 Atmel Corporation, AT90USB1286 Datasheet - Page 260

• Manufacturer Part Number: AT90USB1286
• Manufacturer: Atmel Corporation

Specifications of AT90USB1286

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 48
• Ext Interrupts: 16
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 10
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.10.1
21.10.2
21.11 ID detection
260
AT90USB64/128
Peripheral mode
Host mode
Figure 21-16. Plug-in Detection Input Block Diagram
The control logic of the VBUS pad outputs a signal regarding the VBUS voltage level :
The USB peripheral cannot attach to the bus while VBUS bit is not set.
The Host must use the UVCON pin to drive an external power switch or regulator that powers
the Vbus line. The UVCON pin is automatically asserted and set high by hardware when
UVCONE and VBUSREQ bits are set by firmware.
If a device connects (pull-up on DP or DM) within 300ms of Vbus delivery, the DCONNI flag will
rise. But, once VBUSREQ bit has been set, if no peripheral connection is detected within 300ms,
the BCERRI flag (and interrupt) will rise and Vbus delivery will be stopped (UVCON cleared).
If that behavior represents a limitation for the Host application, the following work-around may be
used :
The ID pin transition is detected thanks to the following architecture:
• The “Session_valid” signal is active high when the voltage on the VBUS pad is higher or
• The “Vbus_valid” signal is active high when the voltage on the VBUS pad is higher or equal to
• The VBUS status bit is set when VBUS is greater than “Vbus_valid”. The VBUS status bit is
• The VBUSTI flag is set each time the VBUS bit state changes.
1. UVCONE and VBUSREQ must be cleared
2. VBUSHWC must be set (to disable hardware control of UVCON pin)
3. PORTE,7 pin (alternate function of UVCON pin) must be set by firmware
4. a device connection will be detected thanks to the SRPI flag (that may usually be used
equal to 1.4V. If lower than 1.4V, the signal is not active.
4.4V. If lower than 4.4V, the signal is not active.
cleared when VBUS falls below “Session_valid” (hysteresis behavior).
to detect a DP/DM pulse sent by an OTG B-Device that requests a new session)
VBUS
Pad logic
VDD
VSS
Vbus_valid
Session_valid
VBus_pulsing
VBus_discharge
Logic
USBSTA.0
VBUS
7593K–AVR–11/09
VBUSTI
USBINT.0