AT90USB1286 Atmel Corporation, AT90USB1286 Datasheet - Page 368

• Manufacturer Part Number: AT90USB1286
• Manufacturer: Atmel Corporation

Specifications of AT90USB1286

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 48
• Ext Interrupts: 16
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 10
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.2.1
368
AT90USB64/128
Latching of Fuses
Table 29-4.
Note:
Table 29-5.
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
The fuse values are latched when the device enters programming mode and changes of the
fuse values will have no effect until the part leaves Programming mode. This does not apply to
Fuse High Byte
OCDEN
JTAGEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in serial programming mode.
2. See
3. See
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
1. The default value of SUT1..0 results in maximum start-up time for the default clock source
2. The default setting of CKSEL3..0 results in External Crystal Oscillator @ 8 MHz. See
3. The CKOUT Fuse allow the system clock to be output on PORTC7. See
4. See
(3)
(4)
(4)
(3)
and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
(258K CK + 4.1ms). See
1 on page 40
on page 46
Fuse High Byte (AT90USB128 : 0x99 - AT90USB64 : 0x9B)
Fuse Low Byte (0x5E)
Table 28-8 on page 364
“Watchdog Timer Control Register - WDTCSR” on page 65
“System Clock Prescaler” on page 47
Bit No
7
6
5
4
3
2
1
0
for details.
for details.
Bit No
7
6
5
4
3
2
1
0
Description
Enable OCD
Enable JTAG
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
for details)
Select Boot Size (see
for details)
Select Reset Vector
Table 8-1 on page 58
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
Table 29-6
Table 29-6
for details.
for details.
Default Value
1 (unprogrammed, OCD disabled)
0 (programmed, JTAG enabled)
0 (programmed, SPI prog. enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM not
preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
Default Value
0 (programmed)
1 (unprogrammed)
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
for details.
(2)
(2)
(1)
(2)
“Clock Output Buffer”
(AT90USB128)
(2)
(1)
(2)
(2)
(2)
(AT90USB64)
7593K–AVR–11/09
Table 6-