AT90USB1286 Atmel Corporation, AT90USB1286 Datasheet - Page 262

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AT90USB1286

Manufacturer Part Number
AT90USB1286
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90USB1286

Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
48
Ext Interrupts
16
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
10
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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262
AT90USB64/128
• 0 – UVREGE: USB pad regulator Enable
Set to enable the USB pad regulator. Clear to disable the USB pad regulator.
• 7 – USBE: USB macro Enable Bit
Set to enable the USB controller. Clear to disable and reset the USB controller, to disable the
USB transceiver and to disable the USB controller clock inputs.
• 6 – HOST: HOST Bit
Set to enable the Host mode. Clear to enable the device mode.
• 5 – FRZCLK: Freeze USB Clock Bit
Set to disable the clock inputs (the ”Resume Detection” is still active). This reduces the power
consumption. Clear to enable the clock inputs.
• 4 – OTGPADE: OTG Pad Enable
Set to enable the OTG pad. Clear to disable the OTG pad. The OTG pad is actually the VBUS
pad.
Note that this bit can be set/cleared even if USBE=0. That allows the VBUS detection even if the
USB macro is disabled. This pad must be enabled in both Host and Device modes in order to
allow USB operation (attaching, transmitting...).
• 3-2 – Reserved
The value read from these bits is always 0. Do not set these bits.
• 1 – IDTE: ID Transition Interrupt Enable Bit
Set this bit to enable the ID Transition interrupt generation. Clear this bit to disable the ID Transi-
tion interrupt generation.
• 0 – VBUSTE: VBUS Transition Interrupt Enable Bit
Set this bit to enable the VBUS Transition interrupt generation.
Clear this bit to disable the VBUS Transition interrupt generation.
• 7-4 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 3 – SPEED: Speed Status Flag
This should be read only when the USB controller operates in host mode, in device mode the
value read from this bit is undeterminated.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
USBE
R/W
7
0
R
7
0
-
HOST
R/W
6
0
R
6
0
-
FRZCLK
R/W
5
1
R
5
0
-
OTGPADE
R
4
0
-
R/W
4
0
SPEED
R
3
1
R
3
0
-
R
2
0
R
2
0
-
IDTE
R/W
ID
R
1
0
1
1
VBUSTE
VBUS
R/W
0
0
R
0
0
USBSTA
USBCON
7593K–AVR–11/09

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