ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 110

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ATtiny40

Manufacturer Part Number
ATtiny40
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny40

Flash (kbytes)
4 Kbytes
Pin Count
20
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
Yes
Max I/o Pins
18
Ext Interrupts
18
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATtiny40-MMHR
Quantity:
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ATtiny40
this mode, the sample-and-hold takes place two ADC clock cycles after the rising edge on the
trigger source signal. Three additional CPU clock cycles are used for synchronization logic.
Figure 15-6. ADC Timing Diagram, Auto Triggered Conversion
In Free Running mode, a new conversion will be started immediately after the conversion com-
pletes, while ADSC remains high. See
Figure 15-7. ADC Timing Diagram, Free Running Conversion
Cycle Number
ADC Clock
Trigger
Source
ADATE
ADIF
ADCH
ADCL
Prescaler
Reset
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
MUX and REFS
Update
1
Conversion
Complete
2
One Conversion
12
3
Sample &
Hold
4
13
Figure
5
14
6
15-7.
7
One Conversion
Next Conversion
1
Sign and MSB of Result
LSB of Result
8
9
2
MUX and REFS
Update
10
Conversion
Complete
3
11
Sample & Hold
12
4
13
Sign and MSB of Result
LSB of Result
8263A–AVR–08/10
Next Conversion
1
Prescaler
Reset
2

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