ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 84

• Manufacturer Part Number: ATtiny40
• Manufacturer: Atmel Corporation

Specifications of ATtiny40

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 18
• Ext Interrupts: 18
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12.2.2
12.3
12.4
84
Clock Sources
Counter Unit
ATtiny40
Definitions
visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the
Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.
In 16-bit mode one more 8-bit register is available, the Timer/Counter1 High Byte Register
(TCNT1H). Also, in 16-bit mode, there is only one output compare unit as the two Output Com-
pare Registers, OCR1A and OCR1B, are combined to one, 16-bit Output Compare Register,
where OCR1A contains the low byte and OCR1B contains the high byte of the word. When
accessing 16-bit registers, special procedures described in section
bit Mode” on page 90
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 1. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or
bit defines in a program, the precise form must be used, i.e. TCNT1L for accessing
Timer/Counter1 counter value, and so on.
The definitions in
Table 12-1.
The Timer/Counter can be clocked by an internal or an external clock source. The clock source
is selected by the Clock Select logic which is controlled by the Clock Select (CS1[2:0]) bits
located in the Timer/Counter Control Register (TCCR1A). For details on clock sources and pres-
caler, see
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
12-2
Table 12-2.
Constant
BOTTOM
MAX
TOP
shows a block diagram of the counter and its surroundings.
DATA BUS
“Timer/Counter Prescaler” on page
TCNTn
Definitions
Counter Unit Block Diagram
Description
The counter reaches BOTTOM when it becomes 0x00
The counter reaches its MAXimum when it becomes 0xFF (decimal 255)
The counter reaches the TOP when it becomes equal to the highest value in the count
sequence. The TOP value can be assigned to be the fixed value 0xFF (MAX) or the
value stored in the OCR1A Register. The assignment depends on the mode of operation
Table 11-1
must be followed.
are also used extensively throughout the document.
count
Control Logic
98.
top
TOVn
(Int.Req.)
clk
Tn
“Accessing Registers in 16-
Clock Select
( From Prescaler )
Detector
Edge
8263A–AVR–08/10
Figure
Tn