ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 158

• Manufacturer Part Number: ATtiny40
• Manufacturer: Atmel Corporation

Specifications of ATtiny40

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 18
• Ext Interrupts: 18
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20.3.2
20.3.3
158
ATtiny40
Flash Memory
Configuration Section
The embedded Flash memory of ATtiny40 has four separate sections, as shown in
Table 20-3.
Notes:
ATtiny40 has one configuration byte, which resides in the configuration section. See
Table 20-4.
Table 20-5
into the configuration byte.
Table 20-5.
Notes:
Configuration bits are not affected by a chip erase but they can be cleared using the configura-
tion section erase command (see
configuration bits are locked if Non-Volatile Lock Bit 1 (NVLB1) is programmed.
Section
Code (program memory)
Configuration
Signature
Calibration
Configuration word address
0x00
0x01 ... 0x1F
Bit
7
6
5
4
3
2
1
0
1. This section is read-only.
1. See
(1)
(1)
briefly describes the functionality of all configuration bits and how they are mapped
Bit Name
–
BODLEVEL2
BODLEVEL1
BODLEVEL0
–
CKOUT
WDTON
RSTDISBL
Number of Words and Pages in the Flash
Configuration bytes
Configuration Byte 0
Table 21-6 on page 168
(1)
(1)
(1)
Size (Bytes)
Description
Reserved
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
Reserved
System Clock Output
Watchdog Timer always on
External Reset disable
4096
32
32
32
High byte
Reserved
Reserved
“Erasing the Configuration Section” on page
for BODLEVEL Fuse decoding.
Page Size (Words)
32
32
16
32
Configuration word data
Pages
Low byte
Configuration Byte 0
Reserved
64
1
2
1
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
WADDR
[5:1]
[5:1]
[4:1]
[5:1]
162). Note that
8263A–AVR–08/10
Table
Table
PADDR
[11:6]
[5:5]
20-3.
–
–
20-4.