ATtiny40 Atmel Corporation, ATtiny40 Datasheet - Page 147

• Manufacturer Part Number: ATtiny40
• Manufacturer: Atmel Corporation

Specifications of ATtiny40

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 18
• Ext Interrupts: 18
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

19.3.4
19.3.5
19.3.6
8263A–AVR–08/10
Parity Bit Calculation
Supported Characters
Operation
Figure 19-3. Serial frame format.
Symbols used in
The parity bit is always calculated using even parity. The value of the bit is calculated by doing
an exclusive-or of all the data bits, as follows:
where:
The BREAK character is equal to a 12 bit long low level. It can be extended beyond a bit-length
of 12.
The IDLE character is equal to a 12 bit long high level. It can be extended beyond a bit-length of
12.
Figure 19-4. Supported characters.
The TPI physical layer operates synchronously on the TPICLK provided by the external pro-
grammer. The dependency between the clock edges and data sampling or data change is
shown in
TPICLK
TPIDATA
TPIDATA
TPIDATA
TPIDATA
ST:
D0-D7: Data bits (least significant bit sent first)
P:
SP1:
SP2:
P = D0
P:
D0-D7:
Figure
IDLE
IDLE
IDLE
⊗
IDLE
Start bit (always low)
Parity bit (using even parity)
Stop bit 1 (always high)
Stop bit 2 (always high)
D1
19-5. Data is changed at falling edges and sampled at rising edges.
Figure
⊗
ST
ST
Parity bit using even parity
Data bits of the character
D2
19-3:
⊗
D3
D0
D0
⊗
D4
D1
D1
⊗
D5
DATA CHARACTER
BREAK CHARACTER
IDLE CHARACTER
⊗
D6
⊗
D7
D7
⊗
D7
0
P
P
SP1
SP1
SP2
SP2
IDLE/ST
IDLE/ST
IDLE/ST
IDLE/ST
147