ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 35
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ATtiny43U
Manufacturer Part Number
ATtiny43U
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny43U
Flash (kbytes)
4 Kbytes
Pin Count
20
Max. Operating Frequency
8 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
0.7 to 5.5
Operating Voltage (vcc)
0.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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7.5.2
8048B–AVR–03/09
PRR – Power Reduction Register
Table 7-2.
• Bit 2 – BODSE: BOD Sleep Enable
BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD disable
is controlled by a timed sequence.
• Bits 7:5 – PRE[2:0]: Prepared Read Enable
These bits are used for prepared read operations. See sections
verter” on page 42
• Bit 4 – Res: Reserved Bit
This bit is reserved and will always read zero.
• Bit 3 – PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
• Bit 2 – PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
• Bit 1 – PRUSI: Power Reduction USI
Writing a logic one to this bit shuts down the USI by stopping the clock to the module. When
waking up the USI again, the USI should be re-initialized to ensure proper operation.
• Bit 0 – PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
Bit
0x00 (0x20)
Read/Write
Initial Value
SM1
0
1
1
Sleep Mode Select
PRE2
R
7
0
and
“ADCSRB – ADC Control and Status Register B” on page
PRE1
SM0
R
6
0
1
0
1
PRE0
R
5
0
Sleep Mode
ADC Noise Reduction
Power-down
Reserved
R
4
–
0
PRTIM1
R/W
3
0
PRTIM0
R/W
2
0
“Software Control of Boost Con-
PRUSI
R/W
1
0
PRADC
R/W
0
0
47.
PRR
35
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