ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 47
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ATtiny43U
Manufacturer Part Number
ATtiny43U
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny43U
Flash (kbytes)
4 Kbytes
Pin Count
20
Max. Operating Frequency
8 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
0.7 to 5.5
Operating Voltage (vcc)
0.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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8.11
8.11.1
8048B–AVR–03/09
Register Description
ADCSRB – ADC Control and Status Register B
boost converter, connect pins V
directly to the V
• Bit 7 – BS: Boost Status
The BS bit can be used to identify silent periods of the boost converter. When this bit is one the
boost converter is active and switching, i.e. it is either in Active Regulated Mode, or in the switch-
ing period of Active Low Current Mode. When this bit is zero the boost converter is not switching,
i.e. it is either in Stop Mode or in the non-switching period of Active Low Current Mode.
Alternatively, the BS bit can be programmed to return the state of the duty cycle controller, as
follows:
If the BS bit now is zero the converter is operating in normal duty cycle control mode. If the bit is
one the converter is working in full duty cycle mode.
Bit
0x03 (0x23)
Read/Write
Initial Value
1. Write 11xx xxxx to register PRR
2. Within 3 clock cycles of the above, write 10xx xxxx to register PRR
3. Wait (issue a single-cycle no operation)
4. Within 5 clock cycles of first write, read the BS bit
CC
BS
R
7
0
pin.
ACME
R/W
6
0
BAT
R/W
5
–
0
and LSW to ground and provide the device with supply
ADLAR
R/W
4
0
R/W
3
–
0
ADTS2
R/W
2
0
ADTS1
R/W
1
0
ADTS0
R/W
0
0
ADCSRB
47
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