ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 59

• Manufacturer Part Number: ATtiny43U
• Manufacturer: Atmel Corporation

Specifications of ATtiny43U

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 0.7 to 5.5
• Operating Voltage (vcc): 0.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

10.3
10.3.1
8048B–AVR–03/09
Register Description
MCUCR – MCU Control Register
Figure 10-1. Timing of pin change interrupts
The External Interrupt Control Register A contains control bits for interrupt sense control.
• Bits 1, 0 – ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0
External Interrupt 0 is activated by the external pin INT0 if the I-flag of SREG and the corre-
sponding interrupt mask are set. The level and edges on the external INT0 pin that activate the
interrupt are defined in
Edges on INT0 are registered asynchronously. Pulses on INT0 wider than the pulse width given
in
erate an interrupt.
Bit
0x35 (0x55)
Read/Write
Initial Value
pcint_setflag
pcint_in_(0)
Table 20-6 on page 158
PCINT(0)
pcint_syn
pin_sync
pin_lat
PCINT(0)
PCIF
clk
clk
BODS
LE
R/W
7
0
pin_lat
Table 10-2 on page
D
PUD
Q
R/W
6
0
pin_sync
will generate an interrupt. Shorter pulses are not guaranteed to gen-
PCINT(0) in PCMSK(x)
R/W
SE
5
0
pcint_in_(0)
SM1
R/W
60.
4
0
0
x
clk
SM0
R/W
3
0
pcint_syn
BODSE
R/W
2
0
pcint_setflag
ISC01
R/W
1
0
ISC00
R/W
PCIF
0
0
MCUCR
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