ATtiny43U Atmel Corporation, ATtiny43U Datasheet - Page 97

• Manufacturer Part Number: ATtiny43U
• Manufacturer: Atmel Corporation

Specifications of ATtiny43U

• Flash (kbytes): 4 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 8 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 0.7 to 5.5
• Operating Voltage (vcc): 0.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

• Bit 1 – OCFnA: Output Compare Flag n A
The OCFnA bit is set when a Compare Match occurs between the Timer/Countern and the data
in OCRnA – Output Compare Registern A. OCFnA is cleared by hardware when executing the
corresponding interrupt handling vector. Alternatively, OCFnA is cleared by writing a logic one to
the flag. When the I-bit in SREG, OCIEnA (Timer/Countern Compare Match Interrupt Enable),
and OCFnA are set, the Timer/Countern Compare Match Interrupt is executed.
• Bit 0 – TOVn: Timer/Countern Overflow Flag
The bit TOVn is set when an overflow occurs in Timer/Countern. TOVn is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, TOVn is cleared by
writing a logic one to the flag. When the SREG I-bit, TOIEn (Timer/Countern Overflow Interrupt
Enable), and TOVn are set, the Timer/Countern Overflow interrupt is executed.
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