SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 1209

• Manufacturer Part Number: SAM9X35
• Manufacturer: Atmel Corporation

Specifications of SAM9X35

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

46.7.57
Name:
Address:
Access:
Reset:
• DMA: End of DMA Transfer Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• DSCR: Descriptor Loaded Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• ADD: Head Descriptor Loaded Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• DONE: End of List Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• OVR: Overflow Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• UDMA: End of DMA Transfer for U or UV Chrominance Component Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• UDSCR: Descriptor Loaded for U or UV Chrominance Component Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
1209
1209
31
23
15
–
–
–
7
–
SAM9X35
SAM9X35
High End Overlay Layer Interrupt Mask Register
LCDC_HEOIMR
0xF8038294
Read-only
0x00000000
UOVR
VOVR
OVR
30
22
14
–
6
VDONE
UDONE
DONE
29
21
13
–
5
UADD
VADD
ADD
28
20
12
–
4
VDSCR
UDSCR
DSCR
27
19
11
–
3
VDMA
UDMA
DMA
26
18
10
–
2
25
17
–
–
9
–
1
–
11055B–ATARM–22-Sep-11
11055B–ATARM–22-Sep-11
24
16
–
–
8
–
0
–