SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 738
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 738 of 1325
- Download datasheet (30Mb)
37.7.2
Name:
Address:
Access:
• CHIDx: Channel ID
0 = No effect.
1 = Enable PWM output for channel x.
37.7.3
Name:
Address:
Access:
• CHIDx: Channel ID
0 = No effect.
1 = Disable PWM output for channel x.
738
738
31
23
15
31
23
15
–
–
–
7
–
–
–
–
7
–
SAM9X35
SAM9X35
PWM Enable Register
PWM Disable Register
30
22
14
30
22
14
0xF8034004
–
–
–
6
–
–
–
–
6
–
PWM_ENA
Write-only
PWM_DIS
0xF8034008
Write-only
29
21
13
29
21
13
–
–
–
5
–
–
–
–
5
–
28
20
12
28
20
12
–
–
–
4
–
–
–
–
4
–
CHID3
CHID3
27
19
11
27
19
11
–
–
–
3
–
–
–
3
CHID2
CHID2
26
18
10
26
18
10
–
–
–
2
–
–
–
2
CHID1
CHID1
25
17
25
17
–
–
9
–
1
–
–
9
–
1
11055B–ATARM–22-Sep-11
11055B–ATARM–22-Sep-11
CHID0
CHID0
24
16
24
16
–
–
8
–
0
–
–
8
–
0
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