SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 1318

• Manufacturer Part Number: SAM9X35
• Manufacturer: Atmel Corporation

Specifications of SAM9X35

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

30 DDR SDR SDRAM Controller (DDRSDRC) ......................................... 419
31 DMA Controller (DMAC) ....................................................................... 467
32 USB High Speed Port (UHPHS) ........................................................... 525
33 USB High Speed Device Port (UDPHS) .............................................. 531
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29.10
29.11
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29.16
30.1
30.2
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30.7
31.1
31.2
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31.5
31.6
31.7
32.1
32.2
32.3
32.4
32.5
SAM9X35
Application Example ......................................................................................375
Product Dependencies ..................................................................................375
External Memory Mapping .............................................................................376
Connection to External Devices ....................................................................376
Standard Read and Write Protocols ..............................................................381
Automatic Wait States ...................................................................................389
Data Float Wait States ...................................................................................393
External Wait .................................................................................................397
Slow Clock Mode ...........................................................................................403
Asynchronous Page Mode ............................................................................406
Programmable IO Delays ..............................................................................409
Static Memory Controller (SMC) User Interface ............................................410
Description .....................................................................................................419
Embedded Characteristics ............................................................................419
DDRSDRC Module Diagram .........................................................................421
Initialization Sequence ...................................................................................422
Functional Description ...................................................................................427
Software Interface/SDRAM Organization, Address Mapping ........................445
DDR SDR SDRAM Controller (DDRSDRC) User Interface ...........................449
Description .....................................................................................................467
Embedded Characteristics ............................................................................467
Block Diagram ...............................................................................................470
Functional Description ...................................................................................471
DMAC Software Requirements .....................................................................498
Write Protection Registers .............................................................................499
DMA Controller (DMAC) User Interface ........................................................500
Description .....................................................................................................525
Embedded Characteristics ............................................................................525
Block Diagram ...............................................................................................526
Product Dependencies ..................................................................................527
Typical Connection ........................................................................................529
11055B–ATARM–22-Sep-11