SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 242
SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 242 of 1325
- Download datasheet (30Mb)
23.7.21
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• P0-P31: Pull Up Disable.
0: No effect.
1: Disables the pull up resistor on the I/O line.
23.7.22
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• P0-P31: Pull Up Enable.
0: No effect.
1: Enables the pull up resistor on the I/O line.
242
242
P31
P23
P15
P31
P23
P15
P7
P7
31
23
15
31
23
15
7
7
SAM9X35
SAM9X35
PIO Pull Up Disable Register
PIO Pull Up Enable Register
P30
P22
P14
P30
P22
P14
P6
P6
30
22
14
30
22
14
PIO_PUDR
0xFFFFF460 (PIOA), 0xFFFFF660 (PIOB), 0xFFFFF860 (PIOC), 0xFFFFFA60 (PIOD)
Write-only
6
PIO_PUER
0xFFFFF464 (PIOA), 0xFFFFF664 (PIOB), 0xFFFFF864 (PIOC), 0xFFFFFA64 (PIOD)
Write-only
6
P13
P13
P29
P21
P29
P21
P5
P5
29
21
13
29
21
13
5
5
P28
P20
P12
P28
P20
P12
P4
P4
28
20
12
28
20
12
4
4
“PIO Write Protect Mode Register”
“PIO Write Protect Mode Register”
P11
P11
P27
P19
P27
P19
P3
P3
27
19
11
27
19
11
3
3
P26
P18
P10
P26
P18
P10
P2
P2
26
18
10
26
18
10
2
2
.
.
P25
P17
P25
P17
P9
P1
P9
P1
25
17
25
17
9
1
9
1
11055B–ATARM–22-Sep-11
11055B–ATARM–22-Sep-11
P24
P16
P24
P16
P8
P0
P8
P0
24
16
24
16
8
0
8
0
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