SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 916

• Manufacturer Part Number: SAM9X35
• Manufacturer: Atmel Corporation

Specifications of SAM9X35

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 41-8. Enabling Low-power Mode
41.7.5.2
916
916
(CAN_MSR3)
(CAN_MSR1)
(CAN_MR)
(CAN_SR)
(CAN_SR)
CAN BUS
WAKEUP
CAN_TIM
SLEEP
MRDY
MRDY
LPM
SAM9X35
SAM9X35
Disabling Low-power Mode
LPEN= 1
The SLEEP signal in the CAN_SR register is automatically cleared once WAKEUP is set. The
WAKEUP signal is automatically cleared once SLEEP is set.
Reception is disabled while the SLEEP signal is set to one in the CAN_SR register. It is impor-
tant to note that those messages with higher priority than the last message transmitted can be
received between the LPM command and entry in Low-power Mode.
Once in Low-power Mode, the CAN controller clock can be switched off by programming the
chip’s Power Management Controller (PMC). The CAN controller drains only the static current.
Error counters are disabled while the SLEEP signal is set to one.
Thus, to enter Low-power Mode, the software application must:
Now the CAN Controller clock can be disabled. This is done by programming the Power Man-
agement Controller (PMC).
The CAN controller can be awake after detecting a CAN bus activity. Bus activity detection is
done by an external module that may be embedded in the chip. When it is notified of a CAN bus
activity, the software application disables Low-power Mode by programming the CAN controller.
To disable Low-power Mode, the software application must:
The CAN controller synchronizes itself with the bus activity by checking for eleven consecutive
“recessive” bits. Once synchronized, the WAKEUP signal in the CAN_SR register is set.
Mailbox 1
– Set LPM field in the CAN_MR register
– Wait for SLEEP signal rising
– Enable the CAN Controller clock. This is done by programming the Power
– Clear the LPM field in the CAN_MR register
Management Controller (PMC).
Arbitration lost
Mailbox 3
11055B–ATARM–22-Sep-11
11055B–ATARM–22-Sep-11
0x0