SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 964
SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
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- Download datasheet (30Mb)
42.5
42.5.1
42.5.2
42.5.3
42.5.4
964
Product Dependencies
SAM9X35
Power Management
Interrupt Sources
Analog Inputs
I/O Lines
The ADC Controller is not continuously clocked. The programmer must first enable the ADC
Controller MCK in the Power Management Controller (PMC) before using the ADC Controller.
However, if the application does not require ADC operations, the ADC Controller clock can be
stopped when not needed and restarted when necessary. Configuring the ADC Controller does
not require the ADC Controller clock to be enabled.
The ADC interrupt line is connected on one of the internal sources of the Interrupt Controller.
Using the ADC interrupt requires the interrupt controller to be programmed first.
Table 42-2.
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the ADC
input is automatically done as soon as the corresponding channel is enabled by writing the reg-
ister ADC_CHER. By default, after reset, the PIO line is configured as input with its pull-up
enabled and the ADC input is connected to the GND.
The pin ADTRG may be shared with other peripheral functions through the PIO Controller. In
this case, the PIO Controller should be set accordingly to assign the pin ADTRG to the ADC
function.
Table 42-3.
Instance
Instance
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
Peripheral IDs
I/O Lines
19
ID
ADTRG
Signal
AD10
AD11
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
I/O Line
PB18
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB10
PB6
PB7
PB8
PB9
Peripheral
11055B–ATARM–22-Sep-11
X1
X1
X1
X1
X1
X1
X1
X1
X1
X1
X1
X1
B
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