SAM9X35 Atmel Corporation, SAM9X35 Datasheet - Page 984
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
SAM9X35
Manufacturer Part Number
SAM9X35
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9X25.pdf
(45 pages)
3.SAM9X25.pdf
(1145 pages)
4.SAM9X25.pdf
(45 pages)
5.SAM9X25.pdf
(1325 pages)
Specifications of SAM9X35
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Can
2
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9X25 PDF datasheet #2
- SAM9X25 PDF datasheet #3
- SAM9X25 PDF datasheet #4
- SAM9X25 PDF datasheet #5
- Current page: 984 of 1325
- Download datasheet (30Mb)
42.8
Table 42-4.
984
0xC4 - 0xE0
0x7C - 0x90
0x98 - 0xAC
Offset
0xBC
0x0C
0x1C
0x2C
0x3C
0xB0
0xB4
0xB8
0xC0
0xE4
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x38
0x40
0x44
0x50
0x54
0x78
0x94
Analog-to-Digital Converter (ADC) User Interface
...
SAM9X35
Register Mapping
Register
Control Register
Mode Register
Channel Sequence Register 1
Channel Sequence Register 2
Channel Enable Register
Channel Disable Register
Channel Status Register
Reserved
Last Converted Data Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Interrupt Status Register
Reserved
Reserved
Overrun Status Register
Extended Mode Register
Compare Window Register
Channel Data Register 0
Channel Data Register 1
...
Channel Data Register 11
Reserved
Analog Control Register
Reserved
Touchscreen Mode Register
Touchscreen X Position Register
Touchscreen Y Position Register
Touchscreen Pressure Register
Trigger Register
Reserved
Write Protect Mode Register
Any offset not listed in
Table 42-4
must be considered as “reserved”.
ADC_PRESSR
ADC_XPOSR
ADC_YPOSR
ADC_SEQR1
ADC_SEQR2
ADC_CDR11
ADC_WPMR
ADC_CHER
ADC_CHDR
ADC_CHSR
ADC_OVER
ADC_TSMR
ADC_TRGR
ADC_LCDR
ADC_CDR0
ADC_CDR1
ADC_CWR
ADC_EMR
ADC_ACR
ADC_IMR
ADC_IDR
ADC_IER
ADC_ISR
ADC_CR
ADC_MR
Name
...
–
–
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only
Access
...
–
–
–
–
–
–
11055B–ATARM–22-Sep-11
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000100
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
...
–
–
–
–
–
–
–
–
–
–
–
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