SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 406

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
23.13.2
Figure 23-29. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
406
406
internal signal from PMC
SAM3S8/SD8
SAM3S8/SD8
Switching from (to) Slow Clock Mode to (from) Normal Mode
Slow Clock Mode
This write cycle finishes with the slow clock mode set
A [23:0]
NWE
MCK
NCS
of parameters after the clock rate transition
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters.See
page
Figure 23-30
other.
406. The external device may not be fast enough to support such timings.
SLOW CLOCK MODE WRITE
1
illustrates the recommended procedure to properly switch from one mode to the
NWE_CYCLE = 3
1
1
SLOW CLOCK MODE WRITE
1
Reload Configuration Wait State
transition is detected:
1
Slow clock mode
1
2
NORMAL MODE WRITE
NWE_CYCLE = 7
3
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
2
Figure 23-29 on

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