SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 51

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

10.3.3.15
• Active stack pointer
Defines the current stack:
0 = MSP is the current stack pointer
1 = PSP is the current stack pointer.
In Handler mode this bit reads as zero and ignores writes.
• Thread mode privilege level
Defines the Thread mode privilege level:
0 = privileged
1 = unprivileged.
Handler mode always uses the MSP, so the processor ignores explicit writes to the active stack pointer bit of the CON-
TROL register when in Handler mode. The exception entry and return mechanisms update the CONTROL register.
In an OS environment, ARM recommends that threads running in Thread mode use the process stack and the kernel and
exception handlers use the main stack.
By default, Thread mode uses the MSP. To switch the stack pointer used in Thread mode to the PSP, use the MSR instruc-
tion to set the Active stack pointer bit to 1, see
When changing the stack pointer, software must use an ISB instruction immediately after the MSR instruction. This
ensures that instructions after the ISB execute using the new stack pointer. See
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
31
23
15
7
CONTROL register
30
22
14
6
The CONTROL register controls the stack used and the privilege level for software execution
when the processor is in Thread mode. See the register summary in
its attributes. The bit assignments are:
29
21
13
5
Reserved
“MSR” on page
28
20
12
4
Reserved
Reserved
Reserved
144.
27
19
11
3
“ISB” on page 142
26
18
10
2
Active Stack
Table 10-2 on page 43
Pointer
SAM3S8/SD8
SAM3S8/SD8
25
17
9
1
Thread Mode
Privilege
Level
24
16
8
0
for
51
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