SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 89
SAM3SD8C
Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
- Current page: 89 of 1143
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10.11.2
10.11.2.1
10.11.2.2
10.11.2.3
10.11.2.4
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
LDR and STR, immediate offset
Syntax
Operation
Offset addressing
Pre-indexed addressing
Load and Store with immediate offset, pre-indexed immediate offset, or post-indexed immediate
offset.
where:
op
type
cond
Rt
Rn
offset
Rt2
LDR instructions load one or two registers with a value from memory.
STR instructions store one or two register values to memory.
Load and store instructions with immediate offset can use the following addressing modes:
The offset value is added to or subtracted from the address obtained from the register Rn. The
result is used as the address for the memory access. The register Rn is unaltered. The assem-
bly language syntax for this mode is:
The offset value is added to or subtracted from the address obtained from the register Rn. The
result is used as the address for the memory access and written back into the register Rn. The
assembly language syntax for this mode is:
op{type}{cond} Rt, [Rn {, #offset}]
op{type}{cond} Rt, [Rn, #offset]!
op{type}{cond} Rt, [Rn], #offset
opD{cond} Rt, Rt2, [Rn {, #offset}]
opD{cond} Rt, Rt2, [Rn, #offset]!
opD{cond} Rt, Rt2, [Rn], #offset
[Rn, #offset]
LDR
STR
B
SB
H
SH
-
is one of:
Load Register.
Store Register.
is one of:
unsigned byte, zero extend to 32 bits on loads.
signed byte, sign extend to 32 bits (LDR only).
unsigned halfword, zero extend to 32 bits on loads.
signed halfword, sign extend to 32 bits (LDR only).
omit, for word.
is an optional condition code, see
is the register to load or store.
is the register on which the memory address is based.
is an offset from Rn. If offset is omitted, the address is the contents of Rn.
is the additional register to load or store for two-word operations.
“Conditional execution” on page
; immediate offset
; pre-indexed
; post-indexed
; immediate offset, two words
; pre-indexed, two words
; post-indexed, two words
SAM3S8/SD8
SAM3S8/SD8
84.
89
89
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