SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 415

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

23.15.4
Name:
Address:
Access:
• READ_MODE:
1: The read operation is controlled by the NRD signal.
0: The read operation is controlled by the NCS signal.
• WRITE_MODE
1: The write operation is controlled by the NWE signal.
0: The write operation is controlled by the NCS signal.
• EXNW_MODE: NWAIT Mode
The NWAIT signal is used to extend the current read or write signal. It is only taken into account during the pulse phase of
the read and write controlling signal. When the use of NWAIT is enabled, at least one cycle hold duration must be pro-
grammed for the read and write controlling signal.
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
• Disabled Mode: The NWAIT input signal is ignored on the corresponding Chip Select.
• Frozen Mode: If asserted, the NWAIT signal freezes the current read or write cycle. After deassertion, the read/write
cycle is resumed from the point where it was stopped.
– If TDF cycles are programmed, the external bus is marked busy after the rising edge of NRD.
– If TDF optimization is enabled (TDF_MODE =1), TDF wait states are inserted after the setup of NRD.
– If TDF cycles are programmed, the external bus is marked busy after the rising edge of NCS.
– If TDF optimization is enabled (TDF_MODE =1), TDF wait states are inserted after the setup of NCS.
– If TDF optimization is enabled (TDF_MODE =1), TDF wait states will be inserted after the setup of NWE.
– If TDF optimization is enabled (TDF_MODE =1), TDF wait states will be inserted after the setup of NCS.
Value
31
23
15
–
–
–
7
–
0
1
2
3
SMC MODE Register
Name
DISABLED
FROZEN
READY
30
22
14
SMC_MODE[0..4]
0x400E000C [0], 0x400E001C [1], 0x400E002C [2], 0x400E003C [3], 0x400E004C [4]
Read-write
–
–
–
6
–
29
21
13
–
5
Description
Disabled
Reserved
Frozen Mode
Ready Mode
EXNW_MODE
DBW
PS
TDF_MODE
28
20
12
4
27
19
11
–
–
3
–
26
18
10
–
–
2
–
TDF_CYCLES
WRITE_MODE
SAM3S8/SD8
SAM3S8/SD8
25
17
–
9
–
1
READ_MODE
PMEN
24
16
8
–
0
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