SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 474

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

25.1.16.11
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CSS: Master Clock Source Selection
• PRES: Processor Clock Prescaler
• PLLADIV2: PLLA Divisor by 2
474
474
PLLADIV2
31
23
15
–
–
–
7
–
Value
Value
0
1
2
3
0
1
2
3
4
5
6
7
0
1
SAM3S8/SD8
SAM3S8/SD8
PMC Master Clock Register
PMC_MCKR
0x400E0430
Read-write
Name
SLOW_CLK
MAIN_CLK
PLLA_CLK
PLLB_CLK
Name
CLK_1
CLK_2
CLK_4
CLK_8
CLK_16
CLK_32
CLK_64
CLK_3
PLLA Clock Division
PLLA clock frequency is divided by 1.
PLLA clock frequency is divided by 2.
30
22
14
–
–
–
6
PLLBDIV2
PRES
29
21
13
–
–
5
Description
Slow Clock is selected
Main Clock is selected
PLLA Clock is selected
PLLBClock is selected
Description
Selected clock
Selected clock divided by 2
Selected clock divided by 4
Selected clock divided by 8
Selected clock divided by 16
Selected clock divided by 32
Selected clock divided by 64
Selected clock divided by 3
PLLADIV2
28
20
12
–
–
4
“PMC Write Protect Mode Register”
27
19
11
–
–
–
–
3
26
18
10
–
–
–
2
–
.
25
17
–
–
–
9
1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
CSS
24
16
–
–
8
–
0