SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 443

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
25.0.5.2
25.0.5.3
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
4/8/12 MHz Fast RC Oscillator Clock Frequency Adjustment
3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator
this frequency selection, the MOSCRCS bit in the Power Management Controller Status Regis-
ter (PMC_SR) is automatically cleared and MAINCK is stopped until the oscillator is stabilized.
Once the oscillator is stabilized, MAINCK restarts and MOSCRCS is set.
When disabling the Main Clock by clearing the MOSCRCEN bit in CKGR_MOR, the MOSCRCS
bit in the Power Management Controller Status Register (PMC_SR) is automatically cleared,
indicating the Main Clock is off.
Setting the MOSCRCS bit in the Power Management Controller Interrupt Enable Register
(PMC_IER) can trigger an interrupt to the processor.
It is recommended to disable the Main Clock as soon as the processor no longer uses it and
runs out of SLCK, PLLACK or PLLBCK.
The CAL4, CAL8 and CAL12 values in the PMC Oscillator Calibration Register (PMC_OCR) are
the default values set by Atmel during production. These values are stored in a specific Flash
memory area different from the main memory plane. These values cannot be modified by the
user and cannot be erased by a Flash erase command or by the ERASE pin. Values written by
the user's application in PMC_OCR are reset after each power up or peripheral reset.
It is possible for the user to adjust the main RC oscillator frequency through PMC_OCR. By
default, SEL4/8/12 are low, so the RC oscillator will be driven with Flash calibration bits which
are programmed during chip production.
The user can adjust the trimming of the 4/8/12 MHz Fast RC oscillator through this register in
order to obtain more accurate frequency (to compensate derating factors such as temperature
and voltage).
In order to calibrate the 4 MHz oscillator frequency, SEL4 must be set to 1 and a good frequency
value must be configured in CAL4. Likewise, SEL8/12 must be set to 1 and a trim value must be
configured in CAL8/12 in order to adjust the 8/12 MHz frequency oscillator.
It is possible to adjust the oscillator frequency while operating from this clock. For example,
when running on 4 MHz it is possible to change the CAL4 value if SEL4 is set in PMC_OCR.
It is possible to restart, at anytime, a measurement of the main frequency by means of the
RCMEAS bit in Main Clock Frequency Register (CKGR_MCFR). Thus, when MAINFRDY flag is
set, the MAINF field returns the frequency of the main clock and software can calculate the error
with an expected frequency and correct the CAL4 (or CAL8/CAL12) field accordingly. This may
be used to compensate frequency drift due to derating factors such as temperature and/or
voltage.
After reset, the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is disabled and it is
not selected as the source of MAINCK.
The user can select the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator to be the
source of MAINCK, as it provides a more accurate frequency. The software enables or disables
the main oscillator so as to reduce power consumption by clearing the MOSCXTEN bit in the
Main Oscillator Register (CKGR_MOR).
When disabling the main oscillator by clearing the MOSCXTEN bit in CKGR_MOR, the
MOSCXTS bit in PMC_SR is automatically cleared, indicating the Main Clock is off.
SAM3S8/SD8
SAM3S8/SD8
443
443

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