SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 428

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
24.5
Table 24-2.
Note:
428
428
Offset
0x100
0x104
0x108
0x10C
0x110
0x114
0x118
0x11C
0x120
0x124
Peripheral DMA Controller (PDC) User Interface
1. PERIPH: Ten registers are mapped in the peripheral memory space at the same offset. These can be defined by the user
SAM3S8/SD8
SAM3S8/SD8
according to the function and the desired peripheral.)
Register Mapping
Register
Receive Pointer Register
Receive Counter Register
Transmit Pointer Register
Transmit Counter Register
Receive Next Pointer Register
Receive Next Counter Register
Transmit Next Pointer Register
Transmit Next Counter Register
Transfer Control Register
Transfer Status Register
PERIPH
PERIPH_RNPR
PERIPH_RNCR
PERIPH_TNPR
PERIPH_TNCR
PERIPH_PTCR
PERIPH_PTSR
PERIPH_RCR
PERIPH_TCR
PERIPH_TPR
Name
(1)
_RPR
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Write-only
Read-only
Access
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Reset
0
0
0
0
0
0
0
0
0
0

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