SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 448
SAM3SD8C
Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
- Current page: 448 of 1143
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25.1.3
Figure 25-5. General Clock Block Diagram
Figure 25-6.
25.1.4
448
448
XOUT32
(Supply C ontroller)
XOUT
XIN32
XIN
XTALSEL
SAM3S8/SD8
SAM3S8/SD8
Block Diagram
Master Clock Controller
Clock G ene rator
RC Oscillator
Management
Embedded
32 kH z R C
4/8/12 MHz
Embedded
32768 H z
Oscilla tor
Oscilla tor
Resonator
Status
3-20 MH z
Oscilla tor
Ceramic
Crystal
Controller
Crystal
Power
Fast
or
The Master Clock Controller provides selection and division of the Master Clock (MCK). MCK is
the clock provided to all the peripherals.
The Master Clock is selected from one of the clocks provided by the Clock Generator. Selecting
the Slow Clock provides a Slow Clock signal to the whole device. Selecting the Main Clock
saves power consumption of the PLLs.
The Master Clock Controller is made up of a clock selector and a prescaler.
The Master Clock selection is made by writing the CSS field (Clock Source Selection) in
PMC_MCKR (Master Clock Register). The prescaler supports the division by a power of 2 of the
selected clock between 1 and 64, and the division by 3. The PRES field in PMC_MCKR pro-
grams the prescaler.
Control
0
1
0
1
MOSCSEL
PLLB and
PLLA and
Divider /2
PLLBDIV2
PLLADIV2
Divider /2
PLLA Clock
PLLA CK
PLLB Clock
PLLBCK
Main Clock
MAINCK
Sl ow Clock
SLCK
SLCK
MAINCK
PLLBCK
PLLA CK
CSS
Master Clock Controller
PLLA CK
PLLBCK
PLLA CK
MCK
MAINCK
PLLBCK
SLCK
(P MC_MCKR)
/1,/2,/3,/4,/8,
/16,/32,/64
PRES
Prescaler
USBS
CSS
USB Clock C ontroller (PMC_USB)
Programmable Clock Controller
/1,/2,/4,/8,
/16,/32,/64
/1,/2,/3,...,/16
(P MC_PCKx)
Prescaler
Divider
PRES
USBDI V
Peripherals
Clock C ontroller
(PMC_PCERx)
Sleep M ode
Processor
Controller
Divider
ON/OFF
Clock
ON/OFF
/8
ON/OFF
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Free running clock
Processor clock c
Master clock
USB Clock
HCLK
int
SysTick
FCLK
MCK
periph_clk[..]
pck[..]
UDPCK
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