LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 14
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LPC1857_53
Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1853FBD208.pdf
(131 pages)
- Current page: 14 of 131
- Download datasheet (2Mb)
NXP Semiconductors
LPC1857_53
Objective data sheet
Table 3.
Symbol
P2_2
P2_3
P2_4
Pin description
M15
J12
K11
x
x
x
…continued
121
127
128
[3]
[4]
[4]
I; PU -
I; PU -
I; PU -
All information provided in this document is subject to legal disclaimers.
I/O U0_UCLK — Serial clock input/output for USART0 in synchronous
I/O EMC_A11 — External memory address line 11.
O
I/O GPIO5[2] — General purpose digital input/output pin.
I
I
O
I/O I2C1_SDA — I
O
I
I/O GPIO5[3] — General purpose digital input/output pin.
-
O
O
I/O I2C1_SCL — I
I
I
I/O GPIO5[4] — General purpose digital input/output pin.
-
O
O
Rev. 1 — 14 December 2011
Description
R — Function reserved.
mode.
USB0_IND1 — USB0 port indicator LED control output 1.
CTIN_6 — SCT input 6. Capture input 1 of timer 3.
T3_CAP2 — Capture input 2 of timer 3.
EMC_CS1 — LOW active Chip Select 1 signal.
R — Function reserved.
I
U3_TXD — Transmitter output for USART3.
CTIN_1 — SCT input 1. Capture input 1 of timer 0. Capture input 1 of
timer 2.
R — Function reserved.
T3_MAT0 — Match output 0 of timer 3.
USB0_PPWR — VBUS drive signal (towards external charge pump or
power management unit); indicates that VBUS must be driven (active
HIGH). Add a pull-down resistor to disable the power switch at reset.
This signal has opposite polarity compared to the USB_PPWR used on
other NXP LPC parts.
R — Function reserved.
specialized I
U3_RXD — Receiver input for USART3.
CTIN_0 — SCT input 0. Capture input 0 of timer 0, 1, 2, 3.
R — Function reserved.
T3_MAT1 — Match output 1 of timer 3.
USB0_PWR_FAULT — Port power fault signal indicating overcurrent
condition; this signal monitors over-current on the USB bus (external
circuitry required to detect over-current condition).
2
C pad).
2
C pad).
2
2
C1 clock input/output (this pin does not use a
C1 data input/output (this pin does not use a specialized
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
14 of 131
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