LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 60

• Manufacturer Part Number: LPC1857_53
• Description: The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC1857_53
Objective data sheet
Fig 5.
System
AHB MULTILAYER MATRIX
AHB multilayer matrix master and slave connections
bus
= master-slave connection
7.5.1 Features
I-code
CORTEX-M3
TEST/DEBUG
INTERFACE
7.4 AHB multilayer matrix
7.5 Nested Vectored Interrupt Controller (NVIC)
bus
ARM
D-code
The NVIC is part of the Cortex-M3. The tight coupling to the CPU allows for low interrupt
latency and efficient processing of late arriving interrupts.
bus
•
•
•
•
Controls system exceptions and peripheral interrupts.
In the LPC1857/53, the NVIC supports 53 vectored interrupts.
Eight programmable interrupt priority levels, with hardware priority level masking.
Relocatable vector table.
0
GPDMA
1
All information provided in this document is subject to legal disclaimers.
ETHERNET
Rev. 1 — 14 December 2011
USB0
USB1
32-bit ARM Cortex-M3 microcontroller
LCD
MMC
SD/
LPC1857/53
256/512 kB FLASH B
256/512 kB FLASH A
32 kB LOCAL SRAM
40 kB LOCAL SRAM
APB, RTC DOMAIN
masters
32 kB AHB SRAM
16 kB AHB SRAM
16 kB AHB SRAM
AHB REGISTER
16 kB EEPROM
PERIPHERALS
CONTROLLER
INTERFACES,
EXTERNAL
64 kB ROM
slaves
MEMORY
SPIFI
© NXP B.V. 2011. All rights reserved.
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