LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 79

• Manufacturer Part Number: LPC1857_53
• Description: The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC1857_53
Objective data sheet
7.19.3 Alarm timer
7.20.1 Configuration registers (CREG)
7.20.2 System Control Unit (SCU)
7.20.3 Clock Generation Unit (CGU)
7.20 System control
The alarm timer is a 16-bit timer and counts down at 1 kHz from a preset value generating
alarms in intervals of up to 1 min. The counter triggers a status bit when it reaches 0x00
and asserts an interrupt, if enabled.
The alarm timer is part of the RTC power domain and can be battery powered.
The following settings are controlled in the configuration register block:
In addition, the CREG block contains the part identification and part configuration
information.
The system control unit determines the function and electrical mode of the digital pins. By
default function 0 is selected for all pins with pull-up enabled.
Analog I/Os for the ADCs and the DAC as well as most USB pins are on separate pads
and are not controlled through the SCU.
The Clock Generator Unit (CGU) generates several base clocks. The base clocks can be
unrelated in frequency and phase and can have different clock sources within the CGU.
One CGU base clock is routed to the CLKOUT pins. The base clock that generates the
CPU clock is referred to as CCLK.
Multiple branch clocks are derived from each base clock. The branch clocks offer flexible
control for power-management purposes. All branch clocks are outputs of one of two
Clock Control Units (CCUs) and can be controlled independently. Branch clocks derived
from the same base clock are synchronous in frequency and phase.
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Low power consumption.
Interrupt available if system is running.
A qualified event can be used as a wake-up trigger.
State of event interrupts accessible by software through GPIO.
BOD trip settings
Oscillator output
DMA-to-peripheral muxing
Ethernet mode
Memory mapping
Timer/USART inputs
Enabling the USB controllers
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 14 December 2011
32-bit ARM Cortex-M3 microcontroller
LPC1857/53
© NXP B.V. 2011. All rights reserved.
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