LPC1857_53 NXP Semiconductors, LPC1857_53 Datasheet - Page 77
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LPC1857_53
Manufacturer Part Number
LPC1857_53
Description
The LPC1857/53 are ARM Cortex-M3 based microcontrollers for embedded applications
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1853FBD208.pdf
(131 pages)
- Current page: 77 of 131
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NXP Semiconductors
LPC1857_53
Objective data sheet
7.17.5.1 Features
7.18.1.1 Features
7.17.5 Windowed WatchDog Timer (WWDT)
7.18.1 Analog-to-Digital Converter
7.18 Analog peripherals
The purpose of the watchdog is to reset the controller if software fails to periodically
service it within a programmable time window.
Remark: The LPC1857/53 contain two 10-bit ADCs.
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32-bit compare mask. An interrupt is generated when the counter value equals the
compare value, after masking. This mechanism allows for combinations not possible
with a simple compare.
Internally resets chip if not periodically reloaded during the programmable time-out
period.
Optional windowed operation requires reload to occur between a minimum and
maximum time period, both programmable.
Optional warning interrupt can be generated at a programmable time prior to
watchdog time-out.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect feed sequence causes reset or interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 24-bit timer with internal prescaler.
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) uses the IRC as the clock source.
10-bit successive approximation analog to digital converter.
Input multiplexing among 8 pins.
Power-down mode.
Measurement range 0 to VDDA.
Sampling frequency up to 400 kSamples/s.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition on ADCTRIG0 or ADCTRIG1 pins, combined timer
outputs 8 or 15, or the PWM output MCOA2.
Individual result registers for each A/D channel to reduce interrupt overhead.
DMA support.
All information provided in this document is subject to legal disclaimers.
cy(WDCLK)
Rev. 1 — 14 December 2011
4.
cy(WDCLK)
256 4) to (T
32-bit ARM Cortex-M3 microcontroller
cy(WDCLK)
LPC1857/53
2
© NXP B.V. 2011. All rights reserved.
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