MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 153
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MSC8101PG
Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101PG.pdf
(162 pages)
- Current page: 153 of 162
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SUBA
SUBL
SUBNC.W
SXT.x
SXTA.x
TFR
TFRA
TFRA
TFRc
Mnemomic
Subtract (affected by the modifier mode)
Rx – #u5
Rx – rx
Shift left and subtract
(2 * Dn) – Da
Subtract without changing the carry bit in the status register
Dn – #s16
Sign extend
Da[7:0]
Da[15:0]
Dn[31]
Sign extend
rx[7:0]
Rx[15]
Transfer data register to a data register
Da
Register transfer
rx
Move the “other” stack pointer to/from a register, inversely defined by the exception mode
If (SR[EXP] = 1), then NSP
If (SR[EXP] = 1), then Rn
Conditional data register transfer
If T=1, then Da
If T=0, then Da
Rx
Dn
Rx[7:0]; rx[7]
Dn[39:32]
Rx[31:16]
Rx
Dn[7:0]; Da[7]
Dn[15:0]; Da[15]
Rx
Dn
Dn
Dn
Dn
Operation
Rx[31:8]
Dn[39:8]
NSP, else Rn
Table 9-5. Instructions Grouped Alphabetically (Continued)
Rn, else ESP
Dn[39:16]
Description
ESP
Rn
SUBA #u5,Rx {0
SUBA rx,Rx
SUBL Da,Dn
SUBNC.W #s16,Dn {–2
SXT.B Da,DN
SXT.W Da,Dn
SXT.L Dn
SXTA.B rx,Rx
SXTA.W Rx
TFR Da,Dn
TFRA rx,Rx
TFRA OSP,Rn
TFRA Rn,OSP
TFRT Da,Dn
TFRF Da,Dn
Assembler Syntax
u5 < 64}
15
s16 < 2
15
}
Words
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Type
2
2
1
4
1
1
1
2
2
1
2
4
4
2
2
Functional
Arithmetic
Arithmetic
Arithmetic
Arithmetic
Arithmetic
Arithmetic
Arithmetic
Support
Logical
Group
DALU
DALU
DALU
DALU
DALU
Stack
AGU
AGU
AGU
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