MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 72

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MSC8101PG

Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
RXx
TXx
RSCF
FCNT
FCTL
Bits
0
1
2
3
4
5
6
7
8
9
Bit
Bit
FDOM
FDIM
FONEIE
FOFIE
FINFIE
FIEIE
FUDIE
FCIM
FPRC
FMLC
FDOM
0
0
Name
Receive Word Registers [0–3]
Transmit Word Registers [0–3]
Reset Configuration Registers [0–3]
Filter Count Register
EFCOP Control Register
FDIM
1
1
Data Output Mode
Data Input Mode
Data Output Not Empty Interrupt Enable
Data Output Full Interrupt Enable
Data Input Not Full Interrupt Enable
Data Input Empty Interrupt Enable
Coefficients Update Done Interrupt Enable
Coefficients Initialization Mode
Filter Processing State Initialization Mode
Filter Multichannel Mode
FONEIE FOFIE
2
2
3
3
FINFIE
Description
4
4
Table 6-5. HDI16 Registers (Continued)
FIEIE
5
5
Table 6-6. EFCOP Registers
FCNT (Number of coefficients minus 1)
FUDIE
FCTL Bit Descriptions
6
6
FCIM
7
7
0 = DMA triggered on output buffer not empty
1 = DMA triggered on output buffer full
0 = DMA triggered on input buffer not full
1 = DMA triggered on input buffer empty
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = EFCOP processing starts after state initialization
1 = EFCOP processing starts with no state initialization
0 = Disabled
FPRC
8
8
Reset: 0
Reset: 0
FMLC
9
9
10
10
Type: W
Type: W
Type: R
FOM
11
11
Settings
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
FUPD
12
12
Type: R/W
Type: R/W
(RSCFG0) 0x8
(RSCFG1) 0x9
(RX0) 0x7
(RX1) 0x6
(TX0) 0x7
(TX1) 0x6
FAPD
13
13
FLT
14
14
(RSCFG2) 0xA
(RSCFG3) 0xB
(RX2) 0x5
(RX3) 0x4
(TX2) 0x5
(TX3) 0x4
0x0C80
0x0C60
FEN
15
15

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