MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 90

• Manufacturer Part Number: MSC8101PG
• Description: MSC8101PG 16-Bit Digital Signal Processor Quick Reference
• Manufacturer: Motorola / Freescale Semiconductor

BRx
19–20 PS
21–22 DECC
24–26 MS
28–29 ATOM
0–16 BA
Bits
Addr
23
27
30
31
Bit
Bit
WP
EMEMC
DR
V
BA
16
0
Name
(BR0) 0x10100
(BR1) 0x10108
Base Registers [0–7, 10–11]
17
1
—
Base Address
Port Size
Data Error Correction and Checking
Write Protect
Machine Select
External MEMC Enable
Atomic Operation
Data Pipelining
Valid Bit
18
2
19
3
(BR2) 0x10110
(BR3) 0x10118
PS
Description
20
4
Table 6-12. Memory Controller Registers
21
5
DECC
22
Reset: Depends on reset configuration sequence
6
BRx Bit Descriptions
(BR4) 0x10120
(BR5) 0x10128
WP
23
7
BA
01 = 8-bit
00 = Disabled
01 = Normal parity checking
0 = R/W access
000 = GPCM—60x bus (reset value)
001 = GPCM—PowerPC Local bus
010 = SDRAM—PowerPC 60x Bus
011 = SDRAM—reserved
0 = MEMC handles accesses according to MS.
1 = External memory controller handles accesses on the PowerPC 60x bus
00 = Address space controlled by MEMC bank not used for atomic operations
01 = Read-after write atomic (RAWA)
10 = Write-after-read-atomic (WARA)
11 = Reserved
0 = Disabled
0 = Bank invalid
Note: After system reset, the V bit is set in BR0 and reset in BR[1–11].
24
Reset: 0 (bits 16–31)
8
MS
25
9
(BR6) 0x10130
(BR7) 0x10138
10 = 16-bit
10
26
EMEMC
11
27
Settings
11 = 32-bit
10 = R/modify/W parity checking
11 = ECC correction and checking
1 = Read-only
100 = UPMA
101 = UPMB
110 = UPMC
111 = Reserved
1 = Data beats delayed by one cycle
1 = Bank valid
12
28
Type: R/W
(BR10) 0x10150
(BR11) 0x10158
ATOM
13
29
00 = 64-bit
DR
14
30
15
31
V