MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 95
MSC8101PG
Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101PG.pdf
(162 pages)
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MxMR
10–12 G0CLx
Reset
Reset
Bits
2–3
5–7
8–9
Addr
0
1
Bit
Bit
BSEL
RFEN
OP
AMx
DSx
BSEL
16
0
0
0
(MAMR) 0x10170
Name
RLFx
Machine A/B/C Mode Registers
RFEN
17
1
0
0
Bus Select (for banks that select UPMx)
Refresh Enable
Command Opcode
Address Multiplex Size
Disable Timer Period
General Line 0 Control
18
2
0
0
OP
19
3
0
0
(MBMR) 0x10174
WLFx
Description
20
—
4
0
0
Table 6-12. Memory Controller Registers (Continued)
21
5
0
0
AMx
22
MxMR Bit Descriptions
6
0
0
(MCMR) 0x10178
23
7
0
0
TLFx
0 = Assigned to PowerPC 60x bus
0 = Refresh services not required
00 = Normal operation
01 = Write to array
000
001
010
011
100
101
00 = 1 cycle
000 = A12
001 = A11
24
8
0
0
AMx
DSx
25
9
0
0
A[16–31]
A[16–31]
A[16–31]
A[16–31]
A[17–31]
A[18–31]
01 = 2 cycles
010 = A10
011 = A9
External. PowerPC Bus
10
26
0
0
Addr Pin
G0CLx
11
27
0
0
Settings
1 = Assigned to PowerPC Local bus
1 = Refresh services required
10 = Read from array
11 = Run pattern
10 = 3 cycles
100 = A8
101 = A7
12
28
0
0
Type: R/W
MAD
GPL_x4DIS
A[8–23]
A[7–22]
A[6–21]
A[5–20]
A[5–19]
A[5–18]
Signal on External Pin
13
29
1
0
11 = 4 cycles
110 = A6
111 = A5
14
30
0
0
RLFx
15
31
0
0
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