MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 28

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MSC8101PG

Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
External Signals
20
General-
Purpose
PB21
PB20
PB19
PB18
PC31
PC30
PC29
I/O
FCC2:MII, HDLC nibble RxD0
FCC2:HDLC transparent RxD
TDM_A1:nibble L1TXD2
TDM_D2:L1TSYNC/GRANT
FCC2:MII, HDLC nibble RxD1
TDM_A1:nibble L1TXD1
TDM_D2:L1RSYNC
FCC2:MII, HDLC nibble RxD2
I2C:SDA
FCC2:MII, HDLC nibble RxD3
I2C:SCL
BRG1O
CLK1
Timer1/2: TGATE1
BRG2O
CLK2
Timer1:TOUT1
EXT1
BRG3O
CLK3/TIN2
SCC1:CTS, CLSN
Peripheral Controller:
Name
Dedicated I/O
MSC8101 Programmer’s Quick Reference
Table 3-2. External Signals–CPM (Continued)
Direction
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Inout
Input
Inout
Input
Input
Input
Input
Input
Input
Input
Data
FCC2: Media Independent Interface, HDLC Nibble Receive Data
Bit 0
FCC2: HDLC Transparent Serial Receive Data Bit
Time-Division Multiplexing A1:Nibble Layer 1 Transmit Data Bit 2
Time-Division Multiplexing D2: Layer 1 Transmit
Synchronization/Grant
FCC2: Media Independent Interface, HDLC Nibble Receive Data
Bit 1
Time-Division Multiplexing A1:Nibble Layer 1 Transmit Data Bit 1
Time-Division Multiplexing D2: Layer 1 Receive Synchronization
FCC2: Media Independent Interface, HDLC Nibble Receive Data
Bit 2
I2C: Inter-Integrated Circuit Serial Data
FCC2: Media Independent Interface, HDLC Nibble Receive Data
Bit 3
I2C: Inter-Integrated Circuit Serial Clock
Baud-Rate Generator 1 Output
Clock 1
Timer 1/2: Timer Gate 1
Baud-Rate Generator 2 Output
Clock 2
Timer 1: Timer Output 1
External Request Line 1
Baud-Rate Generator 3 Output
Clock 3
Timer Input 2
SCC1: Clear to Send, Collision
Description

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