HFC-S Cologne Chip AG, HFC-S Datasheet - Page 31

• Manufacturer Part Number: HFC-S
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

4.2
Timeslots for transmit direction
Timeslots for receive direction
March 1997
Name
B1_SSL
B2_SSL
AUX1_SSL
AUX2_SSL
Enabling more than one channel on the same slot causes undefined output data.
Name
B1_RSL
B2_RSL
AUX1_RSL
AUX2_RSL
important!
Register bit description of PCM30 bus section
Addr.
(20h)
(21h)
(24h)
(25h)
Bits
(22h)
(23h)
4..0
5
6
7
Bits
(26h)
(27h)
4..0
5
6
7
r/w
w
w
w
w
r/w
w
w
w
w
Function
select PCM30 bus transmission slot (0..31)
ignored
select PCM30 bus data lines
'0'
'1'
transmit channel enable for PCM30 bus
'0'
'1'
Function
select PCM30 bus receive slot (0..31)
unused
select PCM30 bus data lines
'0'
'1'
receive channel enable for PCM30 bus
'0'
'1'
STIO1 output
STIO2 output
disable (reset default)
enable
STIO2 is input
STIO1 is input
disable (reset default)
enable
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HFC-S