HFC-S Cologne Chip AG, HFC-S Datasheet - Page 42

• Manufacturer Part Number: HFC-S
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

6.3
Figure 8: PCM30 bus clock and data alignment
6.4
Timing Diagram 3: PCM30 timing
March 1997
*)
PCM30 bus clock and data alignment for Mitel ST
PCM30 timing
F0IO starts one C4IO clock earlier if bit 3 in MST_MODE register is set. If this bit is set
F0IO is also awaited one C4IO clock cycle earlier.
TM
bus
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HFC-S