IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet

IDT88P8344

Manufacturer Part Number

IDT88P8344

Description

Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0

Manufacturer

Integrated Device Technology

Datasheet

1.IDT88P8344.pdf (98 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

IDT88P8344BHGI

Manufacturer:

NUVOTON

Quantity:

5 000

Company:

BOSTOCK HK LIMITED

Part Number:

IDT88P8344BHGI

Manufacturer:

IDT, Integrated Device Technology Inc

Quantity:

10 000

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

IDT88P8344BHI

Manufacturer:

IDT

Quantity:

200

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concurrently active LPs per interface

Functionality

- Low speed to high speed SPI exchange device

- Logical port (LP) mapping (SPI-3 <-> SPI-4) tables per direction

- Per LP configurable memory allocation

- Maskable interrupts for fatal errors

- Fragment and burst length configurable per interface: min 16 bytes,

Standard Interfaces

- Four OIF SPI-3: 8 or 32 bit, 19.44-133 MHz, 256 address range, 64

- One OIF SPI-4 phase 2: 80 - 400 MHz, 256 address range, 256

- SPI-4 FIFO status channel options:

- Compatible with Network Processor Streaming Interface (NPSI)

- SPI-4 ingress LVDS automatic bit alignment and lane de-skew over the

entire frequency range

- SPI-4 egress LVDS programmable lane pre-skew 0.1 to 0.3 cycle

- IEEE 1149.1 JTAG

- Serial or parallel microprocessor interface for control and monitoring

Full Suite of Performance Monitoring Counters

concurrently active LPs

NPE-Framer mode of operation

- Number of packets

LVDS full-rate

LVTTL eighth-rate

SPI EXCHANGE 4 x SPI-3 TO SPI-4

Control Path

64 Logical Ports

JTAG IF

SPI-3 A

SPI-3 B

SPI-3 C

SPI-3 D

Issue 1.0

SPI-3 to SPI-4 PFP

SPI-4 to SPI-3 PFP

SPI-3 to SPI-4 PFP

SPI-4 to SPI-3 PFP

SPI-3 to SPI-4 PFP

SPI-4 to SPI-3 PFP

SPI-3 to SPI-4 PFP

Data Path

SPI-4 to SPI-3 PFP

Uproc IF

3 interfaces and one SPI-4 interface. The data that enter on the low speed

interface (SPI-3) are mapped to logical identifiers (LIDs) and enqueued for

transmission over the high speed interface (SPI-4). The data that enter on the

high speed interface (SPI-4) are mapped to logical identifiers (LIDs) and

enqueued for transmission over a low speed interface (SPI-3). A data flow

between SPI-3 and SPI-4 interfaces is accomplished with LID maps. The logical

port addresses and number of entries in the LID maps may be dynamically

configured. Various parameters of a data flow may be configured by the user

such as buffer memory size and watermarks. In a typical application, the

IDT88P8344 enables connection of multiple SPI-3 devices to a SPI-4 network

processor. In other applications SPI-3 or SPI-4 devices may be connected to

multiple SPI-3 network processors or traffic managers.

The IDT88P8344 is a SPI (System Packet Interface) Exchange with four SPI-

PFP = Packet Fragment Processor

Ethernet transport

SONET / SDH packet transport line cards

Broadband aggregation

Multi-service switches

IP services equipment

Green parts available, see ordering information

- Number of fragments

- Number of errors

- Number of bytes

Clock Generator

Logical

SPI-4

Ports

256

6370 drw01

IDT88P8344

DSC-6370/7

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