IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 62

• Manufacturer Part Number: IDT88P8344
• Description: Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
• Manufacturer: Integrated Device Technology

Non LID associated interrupt indication register
(Block_base 0x0C00 + Register_offset 0x0C)
0x0C00. The Non LID interrupt indication register is used to determine the status
of SPI-3 and SPI-4 port interrupts. The Non LID associated interrupt indication
register is read and subsequently a “1” is written to acknowledge individual
interrupts in this register. An interrupt is generated when enabled by the
corresponding enable flag in the Non LID associated interrupt indication
register. The bit fields in the Non LID associated interrupt indication register are
described.
the SPI-4 ingress has dropped data due the unavailability of ingress buffering.
SPI-3 ingress has dropped data due the unavailability of ingress buffering.
SPI-3 ingress clock has failed. No transitions were detected on a SPI-3 ingress
clock (I_FCLK)
SPI-3 egress clock has failed. No transitions were detected on a SPI-3 egress
clock (E_FCLK)
SPI-3 buffer has been flushed and data has been lost. A buffer is flushed if an
address parity error is detected, or if an ingress buffer is not available at the time
it is requested.
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
SPI4_LOCK_UN
SPI3_LOCK_UN
SPI3_ICLK_UN
SPI3_ECLK_UN
SPI3_FLUSH
Reserved
The Non LID associated interrupt indication register is at Block_Base
SPI4_LOCK_UN The SPI-4 interface can create an event indicating that
SPI3_LOCK_UN A SPI-3 interface can create an event indicating that a
SPI3_ICLK_UN
SPI3_ECLK_UN A SPI-3 interface can create an event indicating that a
SPI3_FLUSH
Field
0=No operation
1=The SPI-4 interface has dropped data due the
unavailability of ingress buffering.
0=No operation
1=A SPI-3 interface has dropped data due the
unavailability of ingress buffering.
0=No operation
1=A SPI-3 ingress clock has failed.
0=No operation
1=A SPI-3 egress clock has failed.
0=No operation
1=A SPI-3 buffer has been flushed.
A SPI-3 interface can create an event indicating that a
A SPI-3 interface can create an event indicating that a
Bits
31:5
0
1
2
3
4
Length
27
1
1
1
1
1
Initial Value
0b0
0b0
0b0
0b0
0b0
0x0
62
Non LID associated interrupt enable register
(Block_base 0x0C00 + Register_offset 0x0D)
+ Register_offset 0x0D. The Non LID associated interrupt enable register is
used to mask the status of SPI-3 and SPI-4 port interrupts in the Non LID
associated interrupt indication register. The Non LID associated interrupt enable
register has read and write access. The bit fields in the Non LID associated
interrupt enable register are active “1” interrupt enables for the corresponding
bit fields in the Non LID associated interrupt indication register.
LID associated interrupt indication register
(Block_base 0x0C00 + Register_offset 0x0E)
Register_offset 0x0E. The LID associated interrupt indication register is used
to determine the EVENT_TYPE of SPI-3 and SPI-4 interrupts. The
EVENT_TYPE coding is given in the Table 66 - Non critical LID associated
capture table (0x10-0x15). The LID associated interrupt indication register is
read and subsequently a 0xFF must be written for interrupt acknowledge. An
EVENT_TYPE interrupt is generated when enabled by the EVENT_TYPE
enable flag in the LID associated interrupt enable register.
LID associated interrupt enable register
(Block_base 0x0C00 + Register_offset 0x0F)
Register_offset 0x0F. The LID associated interrupt enable register is used to
mask the EVENT_TYPE of SPI-3 and SPI-4 per-LID interrupts. The LID
associated interrupt enable register has read and write access.
SPI4_LOCK_UN
SPI3_LOCK_UN
SPI3_ICLK_UN
SPI3_ECLK_UN
SPI3_FLUSH
Reserved
The Non LID associated interrupt enable register is at Block_Base 0x0C00
The LID associated interrupt indication register is at Block_Base 0x0C00 +
The LID associated interrupt enable register is at Block_Base 0x0C00 +
EVENT_TYPE
Reserved
EVENT_TYPE
Reserved
Field
Field
Field
Bits
Bits
31:6
31:6
5:0
5:0
Bits
31:5
0
1
2
3
4
INDUSTRIAL TEMPERATURE RANGE
Length
Length
Length
26
26
6
6
27
1
1
1
1
1
Initial Value
Initial Value
Initial Value
APRIL 10, 2006
0x0000
0x00
0x00
0x0
0x0
0b0
0b0
0b0
0b0
0b0