IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 19

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IDT88P8344

Manufacturer Part Number
IDT88P8344
Description
Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
Manufacturer
Integrated Device Technology
Datasheet

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Manual phase selection
the FORCE flag is set see Table 99, SPI-4 ingress bit alignment control register
(register_offset 0x11). The PHASE_ASSIGN field see Table 113, SPI-4
ingress manual alignment phase/result register (0x0C to 0x1F) now defines the
selected phase.
Word alignment
Training Control Word is found, then training data is expected to follow the
Training Control Word. The orthogonal training data will be used to align the
word.
at Block_base 0x0300 + Register_offset 0x00) is used to protect against a
random data error during de-skew. If I_DSC=1, then two consecutive de-skew
results are required. It is recommended to set I_DSC to 1.
is more than two bits between the earliest and latest samples, I_DSK_OOR is
set to a logic one. I_DSK_OOR is cleared to a logic zero when the offset is in
range.
Transfer decode and dispatch
and check the DIP-4 for validation.
Transfer decode
4 document [Glossary] for details. If reserved control word, BIT[15:12]=0011,
0001, 0101, or 0111 is detected, a BUS_ERROR event is generated. If a
payload control word is not followed by a data word, or a data word does not
follow a payload control word, a BUS_ERROR event is generated. If abort is
detected, the next packet will be tagged with an error.
Data dispatch
The search key is used to search the dispatch info in Table 86, SPI-4 ingress
LP to LID map (256 entries, one per LP). If the searched port is active, transfer
data is sent to the associated PFP with SOP, EOP, LENGTH, PACKET_ERROR.
If the searched port is inactive, a SPI4_INACTIVE_TRANSFER event is
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
The automatic phase adjustment can be overruled by the processor when
The de-skew block searches for the Training Control Word 0x0FFF. If the
A de-skew control bit (I_DSC in Table 89-SPI-4 ingress configuration register
For diagnostics, an out of range offset between lines is provided. If the offset
In the OUT_OF_SYNCH state, the de-skew block will decode the transfer,
The SPI-4 ingress control word contains various fields. Refer to the OIF SPI-
The port address field of a payload control word is extracted as a search key.
A= A number of consecutive DIP-4 error or reset or interface disabled
B= A number of consecutive DIP-4 error free
or a number of consecutive training pattern received
Figure 8. SPI-4 ingress state diagram
OUT_OF_SYNCH
IN_SYNCH
19
to the IN_SYNCH. The number is defined by the I_INSYNC_THR field in Table
89-SPI-4 ingress configuration register (Block_base 0x0300 + Register_offset
0x00).
4, and dispatches the data.
state. The number is defined by the I_OUTSYNC_THR field in Table 89-SPI-
4 ingress configuration register (Block_base 0x0300 + Register_offset 0x00).
The number is defined by the STRT_TRAIN field in the Table 100 SPI-4 ingress
start up training threshold register (Block_base 0x0300 + Register_offset 0x12).
This feature is disabled if STRT_TRAIN=0.
Control word and data
word).
DIP-4 check
In both IN_SYNCH and OUT_OF_SYNCH states, only control word previous
and following data is checked. Any transition on synch status will be captured.
In IN_SYNCH state, each DIP-4 error is captured and counted.
generated. A SPI-4 inactive transfer event with it's associated LP will be captured
in the Table 40, SPI-4 status register (0x22 in the direct accessed space).
SPI-4 ingress status channel
Calendar structure and swapping
in the Table 89, SPI-4 ingress configuration register (0x00)=1, two sets of
calendars are supported. A calendar selection word must be placed following
the framing bit. Refer to the OIF SPI-4 document [see Glossary] for more details.
SPI-4 ingress status channel frame generation
A number of consecutive error free DIP-4 ingress bursts will lead to a transition
In the IN_SYNCH state, the PFP decodes the status transfer, check the DIP-
A number of consecutive DIP-4 errors will lead to the OUT_OF_SYNCH
A control word is distinguished by the SPI-4 RTCL signal. (logic one = control
For the DIP-4 check algorithm refer to the OIF SPI-4 document [Glossary].
The SPI Exchange supports one or two sets of calendars. If I_CSW_EN field
The status frame can be one of the following cases:


A number of consecutive training patterns will lead to OUT_OF_SYNCH.
All ‘11’ when LVTTL is in the out of synch state
Training pattern when LVDS is in the out of synch state or in periodic training
INDUSTRIAL TEMPERATURE RANGE
6370 drw35
APRIL 10, 2006

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