AN2109 Freescale Semiconductor / Motorola, AN2109 Datasheet - Page 12

• Manufacturer Part Number: AN2109
• Description: MPC555 Interrupts
• Manufacturer: Freescale Semiconductor / Motorola

Real-time clock
The SIMASK (USIU mask register) contains corresponding mask bits for each SIPEND interrupt bit. In
order for interrupts to be fed into the CPU core, the corresponding mask bit must be set. At RESET, the
SIMASK register is set to all 0’s, disabling all interrupt sources.
SIMASK[IRM0] bit is a special case. This is the mask bit for the IRQ[0] input pin, which is a non-
maskable interrupt. Setting this bit to 0 has no effect.
After the SIPEND and SIMASK registers, there is a priority arbiter and encoder. This gives a number
called interrupt code to the highest priority unmasked interrupt. If two or more unmasked interrupt re-
quests occur at the same time, the one with the lowest numbered interrupt code will have priority.
The interrupt code is located in a field of the SIVEC (USIU interrupt vector register). during the interrupt
service routine, the interrupt code will be used as in index into a branch table for branching to the ap-
propriate interrupt source’s service routine. This is why each interrupt code is separated by four bytes,
the width of one instruction. See
Timebase
Interrupts can
be at any level
USIU Module
PLL
PIT
I0
I0
L0
L0
L0
I1
I1
L1 L2 L3 L4 L5 L6
L1
L1
Freescale Semiconductor, Inc.
I2
I2
For More Information On This Product,
L2
L2
- to PowerPC core
I3
I3
Figure 3 USIU Interrupt Structure
Rev. 0, 26 July 2001
MPC555 Interrupts
Table
From Peripherals on IMB3 bus
L3
IREQ
L3
+
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I4
I4
L4
8.
L4
ED0
I5
I5
L5
L5
Interrupt levels 7or 7-31
–
ED1 – ED2 –
I6 L6
I6 L6
I7
I7
L7
L7
ED3 – ED4 – ED5 – ED6 – ED7 –
8-bit code for all 16 sources (others reserved)
Reserved bits 16-31
Reserved bits 16-31
Priority
Arbiter
UIPEND
8
SIPEND
SIMASK
(External interrupts can be
(Enables interrupts
falling edge or level 0
through to IREQ)
Reserved bits 16-31
active)
USIU module
SIVEC
MOTOROLA
interrupts
external
IRQ[0:7]
SIEL
12