AN2109 Freescale Semiconductor / Motorola, AN2109 Datasheet - Page 46

• Manufacturer Part Number: AN2109
• Description: MPC555 Interrupts
• Manufacturer: Freescale Semiconductor / Motorola

7.3.6 Example 6: ISR with Nested Interrupts
Summary: This example discusses how to nest interrupts, (i.e., allow a break in an interrupt service)
routine to service another typically higher priority interrupt. This is conceptual only -- it lists the steps
rather than providing a complete implementation.
Issues:
Interrupt Service Routine Steps for Nested Interrupts
The steps below are similar to examples so far, and illustrate ONE approach to nesting interrupts. Vari-
ations from previously used sequence are in Italics. Depending on the application, the user may want
to change the sequence.
10. Restore contexts and clear MSR[RI] appropriately
11. Return to main program
1. Set MSR[EE] in exception routine to allow additional interrupts.
2. Mask lower priority interrupts (usually desirable)
1. Save “Machine Context” of SRR0:1
2. Set MSR[RI]
3. Mask lower priority interrupts.
4. Set MSR[EE].
5. Save “other context”
6. Determine interrupt source
7. Branch to interrupt handler
8. Disable MSR[EE].
9. Undo masking of lower priority interrupts.
Interrupt sources are mask in the SIMASK register. An example procedure would be:
Instead of writing to the EID special purpose register, write to the EIE register instead. This au-
tomatically sets the EE and RI bits in the MSR.
Write to the EID special purpose register, which sets EE=0, and RI=1
Restore SIMASK from the stack.
• Save SIMASK on the stack
• Find the highest priority pending interrupt (use the cntlzw instruction on the SIPEND register
• Clear the lower priority bits in SIMASK, if any
to count zeroes before the first “1”)
Freescale Semiconductor, Inc.
For More Information On This Product,
Rev. 0, 26 July 2001
MPC555 Interrupts
Go to: www.freescale.com
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