ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 123
![no-image](/images/no-image-200.jpg)
ds3104-se
Manufacturer Part Number
ds3104-se
Description
Line Card Timing Ic With Synchronous Ethernet Support
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS3104-SE.pdf
(135 pages)
- Current page: 123 of 135
- Download datasheet (937Kb)
Table 10-6. LVPECL Level-Compatible Output Pins
(VDD = 1.8V r10%; VDDIO = 3.3V r5%, T
Figure 10-1. Recommended Termination for LVDS Pins
Figure 10-2. Recommended Termination for LVPECL Signals on LVDS Input Pins
________________________________________________________________________________________ DS3104-SE
Differential Output Voltage
Output Offset (Common Mode) Voltage
Difference in Magnitude of Output
Differential Voltage for Complementary
States
Note 1:
Note 2:
DRIVER
With 100 : load across the differential outputs.
The differential outputs can easily be interfaced to LVDS, LVPECL, and CML inputs on neighboring ICs using a few external
passive components. See
LVDS
PARAMETER
DRIVER
LVPECL
50:
50:
:
:
Maxim App Note HFAN-1.0
:
100:
:
(5%)
GND
3.3V
SYMBOL
:
:
ICnPOS
iICnNEG
V
V
V
DOSPECL
ODPECL
OSPECL
A
ICnPOS
ICnNEG
= -40°C to +85°C)
for details.
DS3104
LVDS
DS3104
25qC (Note 1)
IO
CONDITIONS
inputs
LVDS
OCnNEG
OCnPOS
MIN
50:
50:
595
100:
(5%)
TYP
700
0.8
MAX
930
RCVR
LVDS
50
UNITS
mV
mV
V
123
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