ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 76
![no-image](/images/no-image-200.jpg)
ds3104-se
Manufacturer Part Number
ds3104-se
Description
Line Card Timing Ic With Synchronous Ethernet Support
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS3104-SE.pdf
(135 pages)
- Current page: 76 of 135
- Download datasheet (937Kb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 4: Reserved Bit 4 to 1 (RSV[4:1]). These bits are reserved for future use, and can be written to and read
back.
Bit 3: Input Clock 2 Signal Format (IC2SF). For backward compatibility this bit can be written to and read back,
but it does not affect the IC2POS/NEG inputs pins. See Section 7.4.1.
Bit 2: Input Clock 1 Signal Format (IC1SF). For backward compatibility this bit can be written to and read back,
but it does not affect the IC1POS/NEG inputs pins. See Section 7.4.1.
Bit 1: Input Clock 6 Signal Format (IC6SF). For backward compatibility this bit can be written to and read back,
but it does not affect the IC6POS/NEG inputs pins. See Section 7.4.1.
Bit 0: Input Clock 5 Signal Format (IC5SF). For backward compatibility this bit can be written to and read back,
but it does not affect the IC5POS/NEG inputs pins. See Section 7.4.1.
________________________________________________________________________________________ DS3104-SE
RSV4
Bit 7
0
RSV3
Bit 6
0
MCR5
Master Configuration Register 5
36h
RSV2
Bit 5
0
RSV1
Bit 4
0
IC2SF
Bit 3
0
IC1SF
Bit 2
0
IC6SF
Bit 1
0
IC5SF
Bit 0
0
76
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