ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 124

• Manufacturer Part Number: ics1893cy-10
• Description: 3.3-v 10base-t/100base-tx Integrated Phyceiver
• Manufacturer: Integrated Device Technology

9.5.7 MII Management Interface Timing
ICS1893CY-10 Rev 1/07
Table 9-14
timings of signals on the MDC and MDIO pins).
Table 9-14. MII Management Interface Timing
† The ICS1893CY-10 is tested at 25 MHz (a 40-ns period) with a 50-pF load. Designs must account for all board
Figure 9-8. MII Management Interface Timing Diagram
MDC
MDIO
(Output)
MDC
MDIO
(Input)
Period
loading of MDC.
Time
ICS1893CY-10 - Release
t1
t2
t3
t4
t5
t6
MDC Minimum High Time
MDC Minimum Low Time
MDC Period
MDC Rise Time to MDIO Valid
MDIO Setup Time to MDC
MDIO Hold Time after MDC
lists the significant time periods for the MII Management Interface timing (which consists of
t1
Parameter
t3
Copyright © 2007, Integrated Device Technology, Inc.
t2
t5
t4
t6
All rights reserved.
125
Figure 9-8
shows the timing diagram for the time periods.
Conditions
Chapter 9 DC and AC Operating Conditions
–
–
–
–
–
–
400†
Min.
160
160
10
10
0
Typ.
–
–
†
–
–
–
Max.
300
–
–
–
–
–
Units
ns
ns
ns
ns
ns
ns