ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 52

• Manufacturer Part Number: ics1893cy-10
• Description: 3.3-v 10base-t/100base-tx Integrated Phyceiver
• Manufacturer: Integrated Device Technology

6.5.11 10Base-T Operation: Twisted-Pair Transmitter
6.5.12 10Base-T Operation: Twisted-Pair Receiver
6.5.13 10Base-T Operation: Auto Polarity Correction
6.5.14 10Base-T Operation: Isolation Transformer
ICS1893CY-10 Rev 1/07
Note:
1. In 10Base-T mode, a bit time has a typical duration of 100 ns.
2. The SQE Test also has the name 10Base-T Heartbeat. For details on the SQE waveforms, see
The 10Base-T Twisted-Pair Transmitter is functionally similar to the 100Base-TX Twisted-Pair Transmitter.
The primary differences are in the data rate and signaling, as specified in the ISO/IEC specifications. For
more information, see
The 10Base-T Twisted-Pair Receiver is functionally similar the 100Base-TX Twisted-Pair Receiver. The
primary differences are in the data rate and signaling, as specified in the ISO/IEC specifications. For more
information, see
The ICS1893CY-10 can sense and then automatically correct a signal polarity that is reversed on its
Twisted-Pair Receiver inputs. A signal polarity reversal occurs when the input signals on an
ICS1893CY-10’s TP_RXP and TP_RXN pins are crossed or swapped (a problem that can occur during
network installation or wiring).
The ICS1893CY-10 accomplishes reversed signal polarity detection and correction by examining the signal
polarity of the Normal Link Pulses (NLPs). In 10Base-T mode, an ICS1893CY-10 transmits and receives
NLPs when its link is in the Idle state. In 100Base-TX mode, an ICS1893CY-10 transmits and receives
NLPs during Auto-Negotiation. An STA can control this feature using the 10Base-T Operations Register bit
18.3, the Auto Polarity-Inhibit bit. When this bit is logic:
•
•
When an ICS1893CY-10 detects a reversed signal polarity on its Twisted-Pair Receiver pins and the Auto
Polarity-Inhibit bit is also logic zero (enabled), the ICS1893CY-10 (1) automatically corrects the data stream
and (2) sets its Polarity Reversed bit (bit 18.14) to logic one, to indicate to the STA that this situation exists.
Bit 18.14 is a latching high (LH) bit. (For more information on latching high and latching low bits, see
Section 7.1.4.1, “Latching High Bits”
Note:
The 10Base-T Isolation Transformer operates the same as the 100Base-TX Isolation Transformer. In fact,
in a typical ICS1893CY-10 application they are the same unit. For more information, see
“100Base-TX Operation: Isolation
Zero, the ICS1893CY-10 automatically senses and corrects a reversed or inverted signal polarity on its
Twisted-Pair Receive pins (TP_RXP and TP_RXN).
One, the ICS1893CY-10 disables this feature.
– The ICS1893CY-10 SQE Test Inhibit bit (bit 18.2) in the 10Base-T Operations Register is logic one.
9.5.19, “10Base-T: Heartbeat Timing
ICS1893CY-10 Data Sheet - Release
[This bit provides the Station Management entity (STA) with the ability to disable the SQE Test
function.]
The ICS1893CY-10 will not complete the Auto-MDIX function for an inverted polarity cable.
This is a rare event with modern manufactured cables. Full Auto-Negotiation and Auto
Polarity Correction will complete when the Auto-MDIX function is disabled. Software control
for the Auto-MDIX function is available in MDIO Register 19 Bits 9:8.
Section 6.4.6, “100Base-TX Operation: Twisted-Pair
Section 6.4.5, “100Base-TX Operation: Twisted-Pair
Copyright © 2007, Integrated Device Technology, Inc.
Transformer”.
and
(SQE)”.
Section 7.1.4.2, “Latching Low
All rights reserved.
52
Receiver”.
Bits”.)
Transmitter”.
Chapter 6 Functional Blocks
Section 6.4.7,
Section