mpc8569e Freescale Semiconductor, Inc, mpc8569e Datasheet - Page 47

• Manufacturer Part Number: mpc8569e
• Description: Mpc8569e Powerquicc Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

At recommended operating conditions with GV
For recommended operating conditions, see
The following table provides the DDR controller interface capacitance for DDR2 and DDR3.
The following table provides the current draw characteristics for MVREFn.
Freescale Semiconductor
At recommended operating condition with GV
Current draw for DDR2 SDRAM for MVREFn
Current draw for DDR3 SDRAM for MVREFn
Input high voltage
Input low voltage
I/O leakage current
Notes:
1. GV
2. MVREFn is expected to be equal to 0.5 × GV
3. V
4. The voltage regulator for MVREFn must meet the specifications stated in
5. Input capacitance load for DQ, DQS, and DQS are available in the IBIS models.
6. Output leakage is measured with all outputs disabled, 0 V
Input/output capacitance: DQ, DQS, DQS
Delta input/output capacitance: DQ, DQS,
DQS
Note:
1. This parameter is sampled. GVDD = 1.8 V ± 0.1 V (for DDR2), f = 1 MHz, T
2. This parameter is sampled. GVDD = 1.5 V ± 0.075 V (for DDR3), f = 1 MHz, T
supply may or may not be from the same source.
noise on MVREFn may not exceed the MVREFn DC level by more than ±1% of GV
equal to MVREFn with a min value of MVREFn – 0.04 and a max value of MVREFn + 0.04. V
DC level of MVREFn.
(peak-to-peak) = 0.2 V.
(peak-to-peak) = 0.175 V.
TT
DD
is not applied directly to the device. It is the supply to which far end signal termination is made, and it is expected to be
is expected to be within 50 mV of the DRAM’s voltage supply at all times. The DRAM’s and memory controller’s voltage
Parameter
Parameter
Parameter
Table 14. DDR3 SDRAM Interface DC Electrical Characteristics (continued)
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Table 16. Current Draw Characteristics for MVREFn
Table 15. DDR2 and DDR3 SDRAM Capacitance
Table 3.
DD
DD
= 1.5 V
of 1.8 V ± 5% for DDR2 or 1.5 V ± 5% for DDR3
DD
1
Symbol
Symbol
Symbol
and to track GV
I
I
MVREFn
MVREFn
C
C
V
I
V
OZ
DIO
IH
IO
IL
≤
V
OUT
MVREFn + 0.100
DD
≤
Min
GV
DC variations as measured at the receiver. Peak-to-peak
—
—
GND
Min
Min
–50
—
6
DD
.
Table
A
= 25 °C, V
A
16.
= 25 °C, V
Max
MVREFn – 0.100
300
250
DD
DDR2 and DDR3 SDRAM Controller
(that is, ± 15 mV).
OUT
GV
Max
Max
OUT
0.5
50
8
= GVDD/2, V
DD
TT
= GVDD/2, V
should track variations in the
Unit
μA
μA
OUT
Unit
Unit
μA
pF
pF
V
V
OUT
Notes
—
—
Notes
Note
1, 2
1, 2
5
5
6
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