mpc8569e Freescale Semiconductor, Inc, mpc8569e Datasheet - Page 89

• Manufacturer Part Number: mpc8569e
• Description: Mpc8569e Powerquicc Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

2.10.4
The AC timing and voltage parameters must be verified at the measurement point. The package pins of the device must be
connected to the test/measurement load within 0.2 inches of that load, as shown in the following figure.
2.11
This section describes the DC and AC electrical specifications for the Serial RapidIO interface of the MPC8569E, for the
LP-serial physical layer. The electrical specifications cover both single- and multiple-lane links. Two transmitters (short and
long run) and a single receiver are specified for each of three baud rates, 1.25, 2.50, and 3.125 GBaud.
Two transmitter specifications allow for solutions ranging from simple board-to-board interconnect to driving two connectors
across a backplane. A single receiver specification is given that will accept signals from both the short- and long-run transmitter
specifications.
The short-run transmitter must be used mainly for chip-to-chip connections on either the same printed-circuit board or across a
single connector. This covers the case where connections are made to a mezzanine (daughter) card. The minimum swings of the
short-run specification reduce the overall power used by the transceivers.
The long-run transmitter specifications use larger voltage swings that are capable of driving signals across backplanes. This
allows a user to drive signals across two connectors and a backplane. The specifications allow a distance of at least 50 cm at all
baud rates.
All unit intervals are specified with a tolerance of ±100 ppm. The worst case frequency difference between any transmit and
receive clock is 200 ppm.
To ensure interoperability between drivers and receivers of different vendors and technologies, AC-coupling at the receiver input
must be used.Signal Definitions
2.11.1
This section defines terms used in the description and specification of differential signals used by the LP-Serial links.
shows how the signals are defined. The figures show waveforms for either a transmitter output (TD and TD) or a receiver input
Freescale Semiconductor
Serial RapidIO (SRIO)
Compliance Test and Measurement Load
Signal Definitions
The allowance of the measurement point to be within 0.2 inches of the package pins is
meant to acknowledge that package/board routing may benefit from D+ and D– not being
exactly matched in length at the package pin boundary. If the vendor does not explicitly
state where the measurement point is located, the measurement point is assumed to be the
D+ and D– package pins.
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
D+ Package
D+ Package
D– Package
Figure 46. Compliance Test/Measurement Load
+ Package
Silicon
Pin
Pin
Pin
TX
C = C
C = C
NOTE
R = 50 Ω
TX
TX
R = 50 Ω
Serial RapidIO (SRIO)
Figure 47
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