mpc8569e Freescale Semiconductor, Inc, mpc8569e Datasheet - Page 85

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mpc8569e

Manufacturer Part Number
mpc8569e
Description
Mpc8569e Powerquicc Iii Integrated Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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2.10.2.1 PCI Express DC Physical Layer Transmitter Specifications
This section discusses the PCI Express DC physical layer transmitter specifications for 2.5 Gb/s.
The following table defines the PCI Express (2.5 Gb/s) DC specifications for the differential output at all transmitters. The
parameters are specified at the component pins.
2.10.2.2 PCI Express DC Physical Layer Receiver Specifications
This section discusses the PCI Express DC physical layer receiver specifications for 2.5 Gb/s
The following table defines the DC specifications for the PCI Express (2.5 Gb/s) differential input at all receivers (RXs). The
parameters are specified at the component pins.
Freescale Semiconductor
At recommended operating conditions with XV
At recommended operating conditions with ScoreVDD = 1.0 V ± 3%. and 1.1 V ± 3%
Differential input
peak-to-peak
voltage
DC differential
input impedance
Differential peak-to-peak
output voltage
De-emphasized differential
output voltage (ratio)
DC differential TX impedance Z
Transmitter DC impedance
Note:
1. Specified at the measurement point into a timing and voltage compliance test load as shown in
2. Typ-V
3. Typ-V
any 250 consecutive TX UIs.
Parameter
TX-DIFFp-p
TX-DIFFp-p
Parameter
Table 48. PCI Express (2.5Gb/s) Differential Transmitter (TX) Output DC Specifications
Table 49. PCI Express (2.5 Gb/s) Differential Receiver (RX) Input DC Specifications
V
Z
with XV
with XV
RX-DIFF-DC
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
RX-DIFFp-p
Symbol
DD
DD
= 1.0 V
= 1.1 V
V
V
Z
TX-DIFF-DC
TX-DC
TX-DIFFp-p
TX-DE-RATIO
Symbol
Min
175
80
DD
= 1.0 V ± 3%. and 1.1 V ± 3%
Min
800
3.0
80
40
Typ
100
1000
1100
Typ
100
3.5
50
1200
Max
120
2
3
/
1200
Max
120
4.0
60
Unit
mV
Ω
Unit
mV
dB
Ω
Ω
V
RX DC Differential mode impedance. See Note 2.
RX-DIFFp-p
V
Ratio of the V
following bits after a transition divided by the
V
Note 1.
TX DC Differential mode Low Impedance
Required TX D+ as well as D– DC Impedance
during all states
TX-DIFFp-p
TX-DIFFp-p
= 2 × |V
of the first bit after a transition. See
= 2 × |V
TX-DIFFp-p
RX-D+
Comments
Comments
Figure 46
TX-D+
– V
of the second and
RX-D–
– V
and measured over
TX-D–
|. See note 1.
| See note 1.
PCI Express
85

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