mpc8569e Freescale Semiconductor, Inc, mpc8569e Datasheet - Page 69

• Manufacturer Part Number: mpc8569e
• Description: Mpc8569e Powerquicc Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

2.6.4.1.3
The following table lists the SGMII DC receiver electrical characteristics. Source synchronous clocking is not supported. Clock
is recovered from the data.
2.6.4.2
This section discusses the AC timing specifications for the SGMII interface.
2.6.4.2.1
Note that the SGMII clock requirements for SD_REF_CLK and SD_REF_CLK are intended to be used within the clocking
guidelines specified by
Freescale Semiconductor
At recommended operating conditions with XV
DC Input voltage range
Input differential voltage
Loss of signal threshold
Receiver differential input impedance
Notes:
1. Input must be externally AC-coupled.
2. V
3. The concept of this parameter is equivalent to the electrical idle detect threshold parameter in PCI Express. See
4. The LSTS shown in this table refers to the LSTS2 or LSTS3 bit field of the MPC8569E‘s SerDes control register SRDSCR4.
s
Section 2.10.2, “PCI Express DC Physical Layer Specifications,”
Specifications,” for further explanation.
RX_DIFFp-p
is also referred to as peak-to-peak input differential voltage.
SGMII AC Timing Specifications
Parameter
SGMII DC Receiver Electrical Characteristics
AC Requirements for SGMII SD_REF_CLK and SD_REF_CLK
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Section 2.9.2.4, “AC Requirements for SerDes Reference Clocks.”
Table 37. SGMII DC Receiver Electrical Characteristics
LSTS = 001
LSTS = 100
LSTS = 001
LSTS = 100
DD
= 1.0 V ± 3% and 1.1 V ± 3%.
V
Z
RX_DIFFp-p
Symbol
RX_DIFF
V
—
LOS
Min
175
100
30
65
80
and
Section 2.10.3, “PCI Express AC Physical Layer
Typ
N/A
—
—
—
—
—
1200
Max
100
175
120
Ethernet Interface
Unit
mV
mV
—
Ω
Notes
2, 4
3, 4
—
1
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